How to read it
Follow the width of each band left to right. Bigger bands mean stronger relative dependency in this model.
AI Supply Chain
From wafers to AI demand
An interactive map of the AI semiconductor buildout, showing where materials, equipment, foundries, chip designers, memory, packaging, systems, cloud buyers, and end demand connect.
Key chokepoints
ASML is the sole EUV source; TSMC leads advanced logic and CoWoS; HBM is concentrated among SK Hynix, Samsung, and Micron.
Packaging risk
ABF substrates remain a hard bottleneck. CoWoS capacity is often cited as the gating constraint, with CoWoP as a tail-risk bypass.